In computer programming, the flat memory model is an approach to organizing memory address space. In this model, a computer application uses at most 2 memory segments, one for the program code and one for data. More commonly, the same segment is used for both code and data and it is this arrangement that helped microprocessors such as the MOS Technology 6502 processor become one of the best selling in the history of Computing and one of the most easy microprocessors to program. On 16-bit microprocessors, a flat memory model yields a maximum total code/data size of just 64 kilobytes. In 32-bit models it yields a maximum of 4 gigabytes.

The opposite of the Flat Memory Model is the Segmented Memory Architecture, as implemented on the now ubiquitous Intel 80x86 family of microprocessors. The segmented model divides a large memory space into smaller chunks (called Segments) that can be accessed by giving each chunk a unique number, called a selector. In order to do this, a special Segment Register is used to select the segment you wish to use, then the selected segment is made to look like a normal flat piece of memory. Using this configuration, a 16-bit microprocessor could access up to 4 Gigabytes of memory (65536 segments of 65536 bytes). However, in real mode the arrangement of a Segmented Memory Model is where a 16-bit (64 Kilobyte) addressing space is overlapped every 16 bytes (called a paragraph) in order to create a 1 Megabyte total addressing space.

In protected mode the lower 3 bits of a selector are NOT part of the index. Instead the first 2 bits is the CPL, and the third bit tells the processor which table to look up. If it is zero, the index is in the GDT and if it is one, it is in the current LDT. The processor looks it up in whenever table the index it is in for the segment base, and if it is not found, it causes a fault.

If it is found, the processor adds the offset to the segment base to form a 24-bit or 32-bit physical address.

The advantage of the flat memory model is that applications running in such a model, unlike applications running in a segmented memory model, do not have to switch segments to access additional code or data. Furthermore, manipulating memory and data can be achieved with far fewer internal registers (as shown in the new generation of RISC microprocessors). This drastically simplifies processor architecture from a manufacturing point of view and programming complexity from a programmer's point of view.

These simple benefits of the flat memory model have enabled microprocessors utilising the model to far outperform microprocessors utilising segmented memory models where most other environmental factors (e.g. microprocessor clock speed and memory speed) are considered equal. Put another way, microprocessors utilising a flat memory model have often been shown to achieve equivalent performance of a processor utilising a segmented memory model despite the fact they are running slower clock speeds and have simpler (and cheaper) architectures.