MOS Technology 6507

General information
Launched	1975; 49 years ago (1975)
Common manufacturer	MOS Technology
Performance
Data width	8
Address width	13
Architecture and classification
Instruction set	6502
Number of instructions	56
Physical specifications
Transistors	3,510,[1] 3,218[2]
Package	28-pin DIP
History
Predecessors	Motorola 6800 MOS 6501/6502

The 6507 (typically "sixty-five-oh-seven" or "six-five-oh-seven") is an 8-bit microprocessor from MOS Technology, Inc. It is a version of their 40-pin 6502 packaged in a 28-pin DIP, making it cheaper to package and integrate in systems.^[3] The reduction in pin count is achieved by reducing the address bus from 16 bits to 13 (limiting the available memory range from 64 KB to 8 KB) and removing a number of other pins used only for certain applications.^[4]

To do this, A15 to A13 and some other signals such as the interrupt lines are not accessible. As a result, it can only address 8 KB of memory, which for some applications at the time (1975) was acceptable and not overly restrictive. The entire 6500 CPU family was originally conceived as a line of very low-cost microprocessors for small-scale embedded systems.^[5]

The 6507 and 6502 chips use the same underlying silicon layers, and differ only in the final metallisation layer. This ties the interrupt lines to their inactive level so they are not vulnerable to generating spurious interrupts from noise. The first three digits of the chip identifier are part of the silicon layers, and the final digit is in the metallisation layer. Micro-photography of the 6502 and 6507 shows this difference.^[6]

The 6507 is widely used in two applications: the best-selling Atari 2600 video game console^[7] and peripherals for the Atari 8-bit computers including the 850 Serial & Parallel Interface,^[8] and the 810 and 1050 disk drives.^[9][10] In the 2600, the system is further limited by the design of the ROM cartridge slot, which only allows for 4 KB of the external memory to be addressed. The other 4 KB is reserved for the internal RAM and I/O chips, using a minimal-cost partial decoding technique that causes the RAM and peripheral device registers to appear at multiple aliased addresses throughout the 4 K address space.^[11]

Most other machines, notably home computers based on the 650x architecture, use either the standard 6502 or extended versions of it, in order to allow for more memory.

By the time the 6502 line was becoming widely used around 1980, ROM and RAM semiconductor memory prices had fallen to the point where the 6507 was no longer a worthwhile simplification. Its use in new designs ceased at that point, though the Atari 2600 that contains it continued to be sold into the early 1990s, as it was not discontinued until January 1, 1992. However, late-model Atari 2600 consoles do not necessarily contain a discrete 6507 chip.

The 6507 uses a 28-pin configuration, with 13 address pins (A0..A12) and 8 data pins (D0..D7). The seven remaining pins are used for power (Vss, Vcc), the CPU timing clock (φ0, φ2), to reset the CPU (the /RES pin), to request a CPU wait state during its next memory read access (the RDY pin), and for the CPU to indicate if a read or write memory (or MMIO device) access is being performed (the R/W pin). There is no IRQ or NMI pin on the processor.

The RDY pin is not included on all other 28-pin cut-down versions of the 6502. Within the Atari 2600, RDY is used to synchronise the CPU to the television video lines. This function is essential for the 'racing the beam' method used by the 6502 and Atari Television Interface Adaptor chip to generate the television video signal.^[13] In response to a specific address access, the TIA will assert RDY to halt the CPU until the end of the current video scan line.^[14]

• Commodore Semiconductor Group: 6500 Microprocessors Archived 2020-10-01 at the Wayback Machine, November 1985, p. 11.