Langbahn Team – Weltmeisterschaft

LVCMOS

Low voltage complementary metal oxide semiconductor (LVCMOS) is a low voltage class of CMOS technology digital integrated circuits.

Overview

To obtain better performance and lower costs, semiconductor manufacturers reduce the device geometries of integrated circuits. With each reduction the associated operating voltage must also be reduced in order to maintain the same basic operational characteristics of the transistors. As semiconductor technology has progressed, LVCMOS power supply voltage and interface standards for decreasing voltages have been defined by the Joint Electron Device Engineering Council (JEDEC) for digital logic levels lower than 5 volts.

Logic
Volts		 Tolerance
Volts		 Tolerance
Percent		 References
and Notes
5.0 V +/-0.5 V +/-10.0% TTL logic, not LVCMOS
3.3 V +/-0.3 V +/-9.09% JESD8C.01[1]
2.5 V +/-0.2 V +/-8.00% JESD8-5A.01[2] JESD80[3]
1.8 V +/-0.15 V +/-8.33% JESD8-7A[4] JESD76[5]
1.5 V +/-0.1 V +/-8.33% JESD8-11A.01[6] JESD76-3[7]
1.2 V +/-0.1 V +/-8.33% JESD8-12A.01[8] JESD76-2[9]
1.0 V +/-0.1 V +/-8.33% JESD8-14A.01[10]
0.9 V +/-0.045 V +/-5.00%
0.8 V +/-0.04 V +/-5.00%
0.7 V +/-0.05 V +/-7.14%

References

  1. ^ "JEDEC Standard JESD8C.01 — Interface Standard for 3.3V (Normal Range) Power Supply Voltage for Nonterminated Digital Integrated Circuits" (PDF). JEDEC. September 2007. Retrieved March 5, 2019.
  2. ^ "JEDEC Standard JESD8-5A.01 — Interface Standard for 2.5V (Normal Range) Power Supply Voltage for Nonterminated Digital Integrated Circuits" (PDF). JEDEC. September 2007. Retrieved March 5, 2019.
  3. ^ "JEDEC Standard JESD80 — Standard for Description of 2.5V CMOS Logic Devices" (PDF). JEDEC. November 1999. Retrieved March 5, 2019.
  4. ^ "JEDEC Standard JESD8-7A — Interface Standard for 1.8V (Normal Range) Power Supply Voltage for Nonterminated Digital Integrated Circuits" (PDF). JEDEC. September 2007. Retrieved March 5, 2019.
  5. ^ "JEDEC Standard JESD76 — Standard for Description of 1.8V CMOS Logic Devices" (PDF). JEDEC. April 2000. Retrieved March 5, 2019.
  6. ^ "JEDEC Standard JESD8-11A.01 — Interface Standard for 1.5V (Normal Range) Power Supply Voltage for Nonterminated Digital Integrated Circuits" (PDF). JEDEC. September 2007. Retrieved March 5, 2019.
  7. ^ "JEDEC Standard JESD76-3 — Standard for Description of 1.5V CMOS Logic Devices" (PDF). JEDEC. August 2001. Retrieved March 5, 2019.
  8. ^ "JEDEC Standard JESD8-12A.01 — Interface Standard for 1.2V (Normal Range) Power Supply Voltage for Nonterminated Digital Integrated Circuits" (PDF). JEDEC. September 2007. Retrieved March 5, 2019.
  9. ^ "JEDEC Standard JESD76-2 — Standard for Description of 1.2V CMOS Logic Devices" (PDF). JEDEC. June 2001. Retrieved March 5, 2019.
  10. ^ "JEDEC Standard JESD8-14A.01 — Interface Standard for 1.0V (Normal Range) Power Supply Voltage for Nonterminated Digital Integrated Circuits" (PDF). JEDEC. September 2007. Retrieved March 5, 2019.
Quelle: http://en.wikipedia.org/wiki/LVCMOS