Langbahn Team – Weltmeisterschaft

Java processor

A Java processor is the implementation of the Java virtual machine (JVM) in hardware. In other words, the Java bytecode that makes up the instruction set of the abstract machine becomes the instruction set of a concrete machine. These were the most popular form of a high-level language computer architecture, and were "an attractive choice for building embedded and real-time systems that are programmed in Java".[1] However, as of 2017, embedded Java is no longer common and no realtime Java chip vendors exist.[2]

Implementations

There are several research Java processors tested on FPGA, including:

Some commercial implementations included:

  • The aJile processor was the most successful ASIC Java processor.[1]
  • Cjip from Imsys Technologies. Available on boards and with wireless radios from AVIDwireless[6]
  • ARM926EJ-S was an ARM processor able to run Java bytecode, this technology being named Jazelle.

See also

References

  1. ^ a b c d Binder, Walter; Schoeberl, Martin; Moret, Philippe; Villazon, Alex (September 2008). "Cross-Profiling for Embedded Java Processors". 2008 Fifth International Conference on Quantitative Evaluation of Systems. pp. 287–296. doi:10.1109/QEST.2008.39. ISBN 978-0-7695-3360-5. S2CID 16966639.
  2. ^ "Systronix Home". www.systronix.com. Archived from the original on 18 August 2017. Retrieved 6 June 2022.
  3. ^ Yiyu, T.; Wanyiu, L.; Chihang, Y.; Li, R.; Fong, A. (2006). "A Java processor with hardware-support object-oriented instructions". Microprocessors and Microsystems. 30 (8): 469. doi:10.1016/j.micpro.2005.12.007.
  4. ^ Schoeberl, M. (2008). "A Java processor architecture for embedded real-time systems". Journal of Systems Architecture. 54 (1–2): 265–286. CiteSeerX 10.1.1.68.8757. doi:10.1016/j.sysarc.2007.06.001.
  5. ^ Tewary, Manish; Malik, Avinash; Salcic, Zoran; Biglari-Abhari, Morteza (2019). "An Energy Efficient Embedded Processor for Hard Real-Time Java Applications". Architecture of Computing Systems – ARCS 2019. Lecture Notes in Computer Science. 11479: 281–292. doi:10.1007/978-3-030-18656-2_21. hdl:2292/62302. ISBN 978-3-030-18655-5. S2CID 153311249.
  6. ^ "Imsys hedges bets on Java: rewritable-microcode chip has instruction sets for Java, Forth, C/C++"] by Tom R. Halfhill [1] Archived 2008-11-19 at the Wayback Machine